Inspiring the Evolution of Embedded Design | December 8, 2020 Microcontroller Watch | | |
| MCU Family Offers Capacitive Touch Sensing | Renesas Electronics has announced the expansion of its 32-bit RA2 Series MCUs with 20 new RA2L1 Group MCUs. The general-purpose RA2L1 MCUs use the Arm Cortex-M23 core operating up to 48MHz. According to the company, the ultra-low power and touch interface of the RA2L1 MCUs make them well suited for home appliance, industrial and building automation, medical and healthcare, and consumer HMI IoT applications. | |
| RISC-V MCU Blends Wi-Fi and BLE Connectivity | Designed for simple and secure connectivity applications, Espressif has introduced ESP32-C3. ESP32-C3 is a cost-effective, RISC-V-based MCU with Wi-Fi and Bluetooth LE 5.0 connectivity for secure IoT applications. ESP32-C3 attempts to address the most common needs for connected devices. | |
| 8-bit MCUs Feature CAN FD Network Support | Microchip Technology has announced its PIC18 Q84 family—the first PIC18 MCU family that can be used to transmit and receive data through a CAN FD bus. Accompanied by an extensive array of Core Independent Peripherals (CIPs) that handle a variety of tasks without requiring CPU intervention, Microchip’s PIC18 Q84 family cuts both time and cost when connecting systems to a CAN FD network, says the company. | |
| Build a Music Composition Assistant: Using PIC32 MCU | Motivated by the tedious nature of the sheet music annotation process, these three Cornell students built a system designed as a music composition assistant for composers, arrangers and musicians at all levels. Called PICcompose, this is a PIC32 MCU-based, end-to-end tool that converts raw audio from playing an instrument directly into an editable sheet music score. In this article, they describe the design and components of the system. | |
| MCU Gets PSA L2 and SESIP L2 Certifications | NXP Semiconductors has announced that its LPC55S16 MCU has been awarded Level 2 certifications by both the PSA Certified scheme co-developed by Arm and the GlobalPlatform Security Evaluation Standard for IoT Platforms (SESIP) using the secure protection profile for embedded processors. | |
Codasip Unveils Linux-Ready RISC-V Cores with AI and Multi-Core Support Codasip announced three new Linux-friendly, 64-bit RISC-V cores: an edge AI oriented A70XP core with RISC-V P extensions and SMP-ready, up to quad-core A70X MP and A70XP MP models. | | |
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