IAR Systems has presented a new version of its professional development tools for RISC-V. With the latest release, the complete development toolchain IAR Embedded Workbench for RISC-V adds support for latest Andes RISC-V extension and devices, enabling maximized performance in RISC-V-based applications.

SEGGER and Codasip have announced that SEGGER’s J-Link debug probes and its Embedded Studio IDE fully support Codasip’s RISC-V processors, right out-of-the-box. SEGGER’s J-Link debug probe supports RISC-V debug on Codasip’s processor cores. Furthermore, J-Link, using the Open Flashloader concept, allows programming of flash memories connected to devices using Codasip RISC-V cores.

LDRA and OpenSynergy, a specialist in high-quality embedded automotive software, have announced their partnership to support and promote a defense-in-depth strategy combining hypervisor technology with secure coding techniques. OpenSynergy focusses on the automotive virtual platform COQOS Hypervisor SDK based on VIRTIO technology. The hypervisor on this platform runs directly on the SoC application cores and creates several VMs.